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| author | Stanislaw Halik <sthalik@misaki.pl> | 2018-05-21 05:14:15 +0200 |
|---|---|---|
| committer | Stanislaw Halik <sthalik@misaki.pl> | 2018-05-21 05:14:15 +0200 |
| commit | 5a6baa3a11e5cc2a917ef0bc901ae27ca0f13576 (patch) | |
| tree | a7eb3323503378e6f3d600957229b2ea87cedaba /logic | |
| parent | d21067c8c8e5ff9e4e214285ee914b67eb782719 (diff) | |
logic/pipeline: don't enable center twice
Diffstat (limited to 'logic')
| -rw-r--r-- | logic/pipeline.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/logic/pipeline.cpp b/logic/pipeline.cpp index 5420c112..7626f2dd 100644 --- a/logic/pipeline.cpp +++ b/logic/pipeline.cpp @@ -674,7 +674,7 @@ bool bits::get(flags flag) bits::bits() : b(0u) { - set(f_center, true); + set(f_center, false); set(f_held_center, false); set(f_enabled_p, true); set(f_enabled_h, true); |