From 2f839459e91b01aa5caba10b5ba9fa70968aceea Mon Sep 17 00:00:00 2001 From: Stanislaw Halik Date: Thu, 13 Apr 2017 09:55:32 +0200 Subject: logic/tracker: zero at the right pipeline stage --- logic/tracker.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/logic/tracker.cpp b/logic/tracker.cpp index 95f7b38f..bb207e22 100644 --- a/logic/tracker.cpp +++ b/logic/tracker.cpp @@ -294,10 +294,6 @@ void Tracker::logic() for (int i = 3; i < 6; i++) value(i) = map(value(i), m(i)); - if (get(f_zero)) - for (int i = 0; i < 6; i++) - value(i) = 0; - const bool reltrans = !get(f_tcomp_disabled); if (s.tcomp_p && reltrans) @@ -347,6 +343,10 @@ void Tracker::logic() (void) map(raw_6dof(i), m(i)); } + if (get(f_zero)) + for (int i = 0; i < 6; i++) + value(i) = 0; + // custom zero position for (int i = 0; i < 6; i++) value(i) += m(i).opts.zero * (m(i).opts.invert ? -1 : 1); -- cgit v1.2.3